1. Field of the Invention
The present invention relates to a multi-layer ceramic capacitor constituted by ceramic dielectric layers alternately laminated with conductive layers, as well as a method of manufacturing such multi-layer ceramic capacitor.
2. Description of the Related Art
As mobile phones and other digital electronic devices become increasingly smaller and thinner, there is a drive to make the multi-layer ceramic capacitors (MLCCs) surface-mounted on their electronic circuit boards, etc., smaller in size while larger in capacity at the same time. A multi-layer ceramic capacitor has a structure whereby ceramic dielectric layers constituting dielectrics are alternately laminated with conductive layers constituting internal electrodes.
In general, the smaller the size of the capacitor, the smaller the area of the internal electrodes facing the dielectrics becomes and consequently the capacitance decreases. This means that, to make sure a capacitor designed for a smaller chip provides enough capacitance, high-density lamination technology to make the dielectric and internal electrode layers thinner and to laminate many of these layers is essential.
Incidentally, dielectric ceramics whose sintered crystal grains have a core-shell structure have traditionally been known as offering good temperature characteristics. For example, core-shell structured dielectric ceramics whose dielectric constant is subject to less temperature variation can be obtained by adding an auxiliary component containing rare earth elements, etc., to a primary component being barium titanate (BaTiO3) and then sintering the mixed components while suppressing grain growth (refer to Patent Literature 1, for example).
Core-shell structured dielectric ceramics have presented a problem in that, because the auxiliary component of a relatively low dielectric constant turns into solid solution and forms an outer shell around the core, achieving a high dielectric constant is difficult. Also because the core-shell structure is formed while grain growth is suppressed, the dielectric constant is also kept low due to the sizing effect of relatively small grains.
On the other hand, multi-layer ceramic capacitors have been proposed that are formed by mixing grains having a core-shell structure with grains of a uniform grain structure (these grains are referred to as “uniform solid-solution grains” in the present application for patent) to meet the demand for size reduction and capacity increase (refer to Patent Literature 2, for example). Here, a “uniform grain structure” refers to a state where the core-shell structure has been lost in the ceramic-sintering process due to the progression of diffusion of the auxiliary component as solid solution into the core.
With the multi-layer ceramic capacitor in Patent Literature 2, for example, an appropriate sintering temperature and sintering time are selected so that in any section of the dielectric layer, grains having a core-shell structure and uniform grains are mixed at an area ratio in a range of 2:8 to 4:6. This way, a specific dielectric constant of 4500 or more and temperature characteristics meeting the JIS standard D are achieved.